Although metal oxide semiconductor field effect transistor (MOSFETs) are fabricated within a common silicon substrate, they must nevertheless be electrically isolated from one another. They are subsequently interconnected to create specific circuit configurations.
MOSFETs are said to be "self-isolated". That is, as long as their source-substrate and drain-substrate pn junctions are held at reverse bias, drain current is due only to current flow from source to drain through a channel under the gate. However, the metal strips used to interconnect MOS transistors form gates of parasitic MOS transistors, with the oxide beneath them forming an undesired gate oxide. To isolate MOSFETs, therefore, it is necessary to prevent the formation of channels in the field regions. One way to accomplish this is to utilize a comparatively thick field oxide layer. However, as device dimensions continue to shrink, thick field oxide regions become undesirable.
Another technique utilized in isolation of transistors raises the doping beneath the field oxide. Such is typically conducted by ion implantation to create what are commonly referred to in the art as "channel stop implants". The combination of field oxide and a channel stop implant can provide adequate isolation for PMOS, NMOS and oxide-isolated bipolar integrated circuits. However, the formation of channel stops in certain applications is not without difficulties and drawbacks.
FIG. 1 illustrates a top plan view of a semiconductor wafer illustrating a MOSFET 10. Such is also shown in cross-section in FIG. 2. MOSFET 10 is comprised of opposing source and drain regions 12 and 14 respectively, and a conductive gate 16 extending to an enlarged area 18 for connection/utilization with other components. Active areas 12 and 14 have a common cross-dimension, or width, "W". Gate oxide layer 20 is provided beneath gate 16 (FIG. 2).
Isolating field oxide 22 has been formed, as illustrated. Such regions include the typical bird's beak regions 24 which laterally extend into the region where active areas 12 and 14 are formed. Blocking p-type implants are provided in the area directly beneath the non-bird's beak regions, thus defining what are commonly known as channel stop regions 26.
Heating of the semiconductor wafer during processing after forming channel stops 26 can cause the stops to migrate in the direction of active areas 12 and 14, and beneath gate 16, in a manner which cannot easily be controlled. FIG. 3 illustrates a worse case scenario where the channel stop implants have migrated considerably, forming channel stops 26a which results in unacceptably high threshold voltage for the device. In another aspect of the prior art, the desired channel stop implants are formed before field oxide regions 22 are created. However unfortunately this causes the implanted p-type material, typically boron, to segregate into the field oxide at the time the field oxide is formed.
Referring to FIG. 4, in many applications the width "W" is critical from a design and operation standpoint. For example, design considerations might mandate for purposes of current flow that the active areas being produced have the width "W" within very tight tolerances. However, the effective width of the active area upon energizing gate 16 may be lengthened somewhat as illustrated by curved line W' due to the narrowing beneath the bird's beak and absence of channel stop implant in this area. The length of line W' is greater than that of W, thus current flow is greater with W'. This could significantly adversely affect circuit operation. It would be desired in certain applications to enable the channel stop implants 26 to extend upwardly to the edge or even into the active area in a controllable, repeatable manner to more accurately produce a desired active area width "W".